SEALSQ Researchers Expose New Side-Channel Risk in Post-Quantum Encryption

A side-channel attack capable of undermining one of the world's newly standardized post-quantum encryption algorithms has been documented by researchers at SEALSQ Corp (NASDAQ: LAES), a company specializing in semiconductors, public key infrastructure, and post-quantum security hardware. The peer-reviewed findings were presented on October 11, 2026, at LightSec 2026 in Antalya, Turkey, an official affiliated workshop of CHES 2026, the leading international conference on cryptographic hardware and embedded systems security.

The paper, titled "Cross-information lattice attack on ML-KEM," focuses on a specific weak point: the encoding step that occurs during key generation in ML-KEM, the Module-Lattice-Based Key Encapsulation Mechanism formerly known as CRYSTALS-Kyber and now codified by NIST as FIPS 203. Even cryptographic schemes considered mathematically airtight against quantum computers can leak information through physical side channels - power consumption, electromagnetic radiation, or timing variations - during real-world execution on hardware. For readers accustomed to thinking about digital security in terms of software alone, this distinction matters: a protocol's theoretical strength says nothing about how securely it is implemented on a chip. The same logic applies broadly across consumer-facing privacy tools, where claims about encryption strength can obscure weaker practices elsewhere in a system, much as understanding what a no-logs policy actually means requires looking past marketing language to the underlying technical and legal reality.

How the Attack Works

The SEALSQ team's method combines two established cryptanalytic approaches: profiling-based side-channel techniques, which build statistical models of a device's physical emissions during cryptographic operations, and lattice reduction, a mathematical technique used to solve the hard problems underlying lattice-based cryptography. By fusing these approaches, the researchers demonstrated that an attacker observing physical leakage during ML-KEM key generation could recover sensitive key material more efficiently than with either technique applied separately. The study also proposes countermeasures intended to harden implementations against this specific attack path, adding to a growing body of defensive research around NIST's post-quantum standards.

Why Implementation Security Matters Now

Lattice-based algorithms like ML-KEM were selected by NIST precisely because they are believed to resist attacks from quantum computers, a threat still years away from practical realization but already shaping long-term security planning. Governments, critical infrastructure operators, and manufacturers of devices with decade-long lifespans are migrating toward these standards now, since hardware deployed today must remain secure long after quantum computing matures. Side-channel vulnerabilities complicate that transition. A government agency or a hardware integrator migrating to post-quantum cryptography cannot rely on mathematical security proofs alone; physical implementation must be tested against real attack conditions, including the kind of hybrid profiling-and-lattice approach SEALSQ's researchers demonstrated.

From Research to Hardware

SEALSQ frames the publication as directly relevant to its own product line, particularly the Quantum Shield QS7001, described as the first commercially available secure element embedding NIST-standardized ML-KEM and ML-DSA algorithms in hardware on a secured RISC-V architecture. The company says the chip includes countermeasures against simple and differential power analysis, along with active shielding and scrambling features meant to blunt exactly the class of attack outlined in the LightSec paper. The QS7001 is currently undergoing Common Criteria EAL5+ certification, a rigorous independent evaluation standard used for high-assurance security hardware.

Carlos Moreira, SEALSQ's Founder, Chairman, and CEO, said presenting peer-reviewed work at a CHES-affiliated venue reflects the company's dual role as both a hardware vendor and a contributor to open cryptographic research, adding that this expertise strengthens its position as institutions and manufacturers prepare for the post-quantum transition.

SEALSQ ML-KEM side-channel attack post-quantum encryption NIST